November 16, 2007 electronics meeting

 

1.      FEB-DCRC comparison                                                    Dennis
Our goal is to review DCRC functionality and try to ensure that we’re aware of all features needed for the next version of the DCRC.

2.      Reports from groups

a.       Berkeley

b.      Denver

c.       Fermilab

d.      Discussion in light of "things to do with v1 list"

3.      Summary of feedback loop amplifier discussion
   Jeter’s compilation of CDMS II settings

4.      Summary of zapping discussion

5.      Summary of list of changes for V2

6.      Discussion of milestones

 

Minutes

 

  1. Dennis’s table was very well received.  There’s a link to it from our main electronics page, and will help us catch features needed for DCRC V2.   For example, it shows that we need +-4 mA QET bias current range for the test facilities, vs. +-2 mA for the experiment.  We may have a jumper to select the ranges.
  2. Bruce confirmed some results on QET bias noise, otherwise no one had much to report.  As time permits, further effort at Berkeley will be on zapping issues.  Fermilab will be focusing on V2 design, and tests needed to support that.
  3. The DCRC V1 feedback amplifier doesn’t have quite as much gain adjustment as FEB.  Jeter found that many channels are pegged at the highest gain adjustment, so this is a concern.  Sten has drawn some options to improve the range and granularity of the adjustment.
  4. There is some concern that the DCRC is not quite as effective at zapping as the FEB, but the situation isn’t clear yet.  Sten provided a schematic for V2 that fixes some minor problems.  It is a bit complex, with switches and a DAC, but zapping is critical to do well.  From the discussion, we’ve decided we do want the ability to zap squids independently, and we do want a DAC, since sometimes increasing the zap power is useful.
  5. To highlight one V2 change in particular, we’re aiming for a 10 MeV range for the charge channel.  There’s an active e-mail thread in progress to determine the gain we need for the noise to be 1-2 bits in order to optimize the range.  Using a 16-bit ADC will add a factor of 4, and it was also pointed out that the FEB had zero-charge in mid-range, which costed a factor of two we won’t pay in the DCRC.
  6. There was some concern that we’re moving ahead with V2 while there is still a lot of testing we can do with V1.  However, there are already several changes for V2 worth trying out, and a need for more cards for test stands.  The milestones allow for time to try out V2 and design changes for a V3.  Our goal is that these changes be minor, although we’re risking more changes by going ahead with V2.