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Name: Silicon Vertex Detector Readout - ver 2(SVX2)	Designer: Tom Zimmerman, LBNL
Process: UTMC 1.2µ CMOS	Experiment: D0
Febrication Date: 1996	Size: 6.3 mm x 8.9 mm
The SVX2 is a 128 channel silicon strip readout chip that is meant to interface with detectors having a pitch of about 50 µ. The chip is designed to run with beam crossings of 396 nsec. The chip has an analog pipeline to provide a delay for a level 1 trigger to be formed. Upon receiving a level 1 trigger, the chip stops acquiring data. The selected data is then digitized, sparsified and readout.
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