Application Specific Integrated Circuit (ASIC) design at Fermilab is concentrated in the Electrical Engineering Department within PPD(Particle Physics Division). The ASIC group had its beginnings in the late 1980's doing semicustom bipolar chip design. Since then, full custom designs have been done in various CMOS and BiCMOS processes. Numerous chip designs have been completed for Fermilab experiments (CDF, Dzero, KTEV, MINOS) as well as for CERN and other special projects.

The ASIC group has 6 experienced designers doing design and layout of analog, and mixed analog/digital circuits as well as silicon detectors. Designs have been submitted to numerous silicon foundries including:

3D Pixel Cell

Currently, much work is being done on radiation hard circuits > 30 Mrads designed in commercial deep sub micron processes. In addition the group has led the HEP community in the development of 3D integrated circuits. The ASIC design team uses modern design tools from vendors such as Cadence, Mentor, and Synopsys.

In addition to design, a small group of technical personnel is devoted to testing ASICs at both the wafer level and chip level. An automated probe station is used for testing of die at the wafer level. Special adapters cards with test sockets are developed for testing of packaged analog or digital parts. Robotic testers have been developed for testing packaged parts.