ADMEM

Design Files

    VME_SLAVE - XC4013E Xilinx
            sheet-1
        sheet-2
        sheet-3
        sheet-4
        sheet-5
            sheet-5A
        sheet 6
        sheet 7

Calorimetry Pipeline - XC4013E Xilinx (pdf)
            top-level
        chan_in
        clock_gen
        address
        mux32_16
        trigsum
                        weight

RAM
        readout
        l2buffers
        iobuf16

    Plug Pipeline - XC4013E Xilinx
        top-level
        chan_in
        clock_gen
        address
        mux32_16
        trigsum
                weight

          add18
        RAM
        readout
        l2buffers
        ramrdr
        iobuf16

    L2 Header - XC4003E Xilinx
        top-level
        static_info
        counter
        clock_gen
        RAM
        Readout
        L2buffers
        IOBUF8

Xilinx Download - XC4003E Xilinx sheet

Flash Control - XC4003E Xilinx sheet

Cafe Timing - XC4003E Xilinx sheet-1 sheet-2

Reset Logic - MACH 110 PLD file

Diagnostic FIFO Sequencer - MACH 110 PLD file